Texas Instruments /MSP432P401R /DMA /DMA_ENASET

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Interpret as DMA_ENASET

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SET_0_WRITE)SET

SET=SET_0_WRITE

Description

Channel Enable Set Register

Fields

SET

Returns the enable status of the channels, or enables the

corresponding channels.

0 (SET_0_READ): Channel C is disabled.

0 (SET_0_WRITE): No effect.

Use the DMA_ENACLR Register to disable a channel.

1 (SET_1_READ): Channel C is enabled.

1 (SET_1_WRITE): Enables channel C.

Writing to a bit where a DMA channel is not implemented has no effect.

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